Lead FPGA Engineer

Job Location	Earlsdon
Education	Not Mentioned
Salary	50,000 - 70,000 per annum
Industry	Not Mentioned
Functional Area	Not Mentioned
Job Type	Permanent , full-time

Job Description

Lead FPGA Engineer- Negotiable SalaryMy client:My client is a leading technology company working on innovative technologies specific to broadband and need a new, experienced Lead FPGA Engineer to help support the business in its delivery of its products.The client is an international company with offices in multiple countries, offering plenty of opportunities to develop for the right Lead FPGA Engineer, with the potential to be able to travel abroad to help support other offices if you wished.It is imperative the right Lead FPGA engineer has experience in FPGA implementation. Other skills can be taught and developed but implementation is crucial.Benefits:

Share options
Gym membership& Cycle to workscheme
25 days holiday plus bank holidays (3 being reserved for Christmas) and additional Holiday purchase options
Potential Hybridset up and Flexible working hours
Potential bonusand salary reviews
A fantastic work environment (have been known to have BBQson lunches, work meals/drinks, etc.)

Your Goal as a Lead FPGA Engineer:As a Lead FPGA Engineer, it is crucial to have experience in FPGA Implementation. Other experiences will be beneficial such as FPGA verification and Xilinx which can be taught if not, but FPGA implementation is a requirement.You will be a good team player, using support and supporting your colleagues by sharing best practice, peer reviews of work and taking ownership of your work to deliver the best service to the clients.You can solve problems using a structured logical process that focuses on innovation through good understanding of the technical domain and has a willingness to learn new skills and continually grow to meet the requirements of the role and the companyQualities and Experience of a Lead FPGA Engineer:

Experience using FPGA design and simulation tools, particularly SoC-based design
Verilog RTL design
Synthesis and simulation
Understand how to meet timing closure
Experience working in telecommunications and/or network management domain (Desirable but not essential)
Experience in System Verilog (Desirable but not essential)

A Lead FPGA Engineers Daily Responsibilities:

On-time delivery of FPGA solution based on requirements from the various engineering teams using Verilog RTL
Delivery of FPGA documentation to engineering and review teams
Use diagnostic tools and techniques to quickly resolve issues
Development of FPGA test benches for simulation and verification

INDG

APPLY NOW