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Principal Application Engineer - IC ASIC Design

Job LocationCambridge
EducationNot Mentioned
Salary100,000 - 125,000 per annum
IndustryNot Mentioned
Functional AreaNot Mentioned
Job TypePermanent , full-time

Job Description

Principal Application Engineer IC ASIC Design Customer FacingCambridge£100,000 - £125,000 per annumPrincipal Application Engineer needed for various applications in the automotive, 5G, or HPC markets.Application engineers are required to support cutting-edge physical implementation projects. You will work with a team of knowledgeable and experienced engineers as well as a group of EDA tool specialists that will be operating in the background.This position is ideal for someone who has several years of relevant experience in the field of IC/ASIC digital design or implementation.Has examined the implementation of structured clocking strategies, advanced node challenges, distance routing strategies, hierarchical flows with power intent, etc., and is now seeking a new challenge in a varied and interesting customer-facing role.Based in our Cambridge office, you will have the chance to work in a huge organisation as a local team member with extensive industry experience.Job Responsibilities:- Utilise components from IC Digital Implementation to offer state-of-the-art IC/ASIC design and implementation.- Participate in the establishment of new flow patterns at client sites.- Conduct instruction in the clients locations.- Acquire the skills and information required to become a product specialist who can oversee client IC/ASIC design projects and provide knowledgeable consultancy.- Give technical assistance to the sales team.- Describe consumer needs and feedback to the engineering and marketing departments for product direction and improvements.- At all organisational levels, present technical and technical sales materials.You:Ideally degree educated and a thorough understanding of the implementation of digital ICs and ASICs in order to be considered. Techniques for putting physical designs into practise via routing and timing. UPF, hierarchical flow, and power-efficient design. Hopefully knowledgeable in Verilog/Hardware VHDLs Description Language. Genus, Innovus, or Tempus. Functionally safe design process, 3DIC, or machine learning would be helpful.Be a team player who can easily integrate into a group environment. Be prepared to visit and perform work at clients sites around Europe.Very competitive salary £100k+ Upto 25% Bonus on top 25 vacation days per yearAlong with life and income insurance, private health and dental insuranceContact us right now for more information on our personal pension plan for employee stock purchases, group cycling programme, gym subsidy, five days of paid time off, and more!

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Principal Application Engineer

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