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C++ Developer

ARM
Job LocationBath
EducationNot Mentioned
SalaryCompetitive salary
IndustryNot Mentioned
Functional AreaNot Mentioned
Job TypePermanent , full-time

Job Description

ARM’s hardware is at the heart of the computing and connectivity revolution that continues to transform the way people live and businesses operate.This position is an excellent opportunity to join a creative, multi-disciplinary, multi-cultural team developing IP that is central to technology platforms across the industry!This role is for the System Memory Management Unit (SMMU) team. As part of the our continued expansion of the SMMU product line into new business areas such as automotive, we are looking to hire passionate engineers to develop their skills in RTL designand verification.The SMMU team is responsible for the development of next-generation Arm SMMU targeting high-end mobile, networking, automotive and enterprise markets. The SMMU is a key component of the Arm Architecture that provides critical and complex functionalitiesthat complement systems design with Arm processors and Multimedia IP.Job Overview:You will be developing and verifying hardware for future generations of SMMU products. You will improve existing IP and their testbenches to increase performance, quality and efficiency. You will also identify areas for improvement and innovation in processesand methodologies, then implement those changes to advance our best-practises for product excellence.Responsibilities:As a member of our team you will develop skills in the following:

  • Contribute to System IP microarchitecture specification and design
  • Contribute in SystemVerilog RTL verification and debug; formal bring-up of non-trivial IP blocks to achieve required quality levels (SystemVerilog/UVM, Formal, scripting)
  • Work closely with engineers across design, performance modelling, validation, and implementation to meet all functional requirements, performance, power and area goals
Required Skills and Experience :
  • You will be able to demonstrate skills in RTL design or verification that you have gained from practical experience.
  • You will have a good university degree, ideally in electronic engineering or computer science, although other graduates would be considered if they have relevant experience.
“Nice To Have” Skills and Experience :
  • Experience of block level RTL design and verification for non-trivial ASIC (or FPGA) developments; SystemVerilog preferred
  • Familiarity with the Arm AMBA specifications or other bus protocols
  • Understanding of digital design to include one or more from CPU, GPU and cache concepts, memory, I/O, etc.
  • Scripting, e.g. with Perl, Python, etc.
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